SK Hynix Inc.

Brand presented its first samples of DDR5 modules in EDSFF E3.S format

The new items are equipped with PCIe 5.0 x8 interface and CXL 2.0 controllers. Mass production of these modules will begin in 2023. At the same time, the company has also introduced an open source HMSDK to develop solutions based on the new memory. It will be available in the fourth quarter of 2022.

The first samples have a very modest capacity (only 96 GB), but they are built on the basis of modern 24 Gb chips made using 1α process technology. There is one more nuance – since, according to the company, there are still no mass server platforms that support E3.S x8, some examples have been adapted for use on existing hardware platforms.

However, AMD, Dell, Intel and Montage have already expressed interest in new products in one form or another. SK hynix, like other members of the CXL consortium, notes that a heterogeneous approach to memory architecture in servers will open up opportunities for composite infrastructure, as well as flexibility in choosing the required level of performance and DRAM capacity. However, full memory flexibility will only be available on platforms supporting CXL 2.0, which upcoming server processors from AMD and Intel will not be able to offer.

SK hynix notes that even a simple combination of DDIMM and CXL modules in a single node will significantly increase the total DRAM bandwidth – from 260-320 GB/s to 360-480 GB/s. The capacity, however, according to SK hynix's calculations, will increase from 768 GB to 1.15 TB. Samsung announced the release of 512GB DDR5 CXL modules this spring and last year introduced the Poseidon V2 platform with support for PCIe 5.0, CXL and E3.S modules.

Images: SK Hynix